About Us: Innatera is a rapidly growing Dutch semiconductor company that develops ultra-efficient neuromorphic processors for AI at the edge. These microprocessors mimic the brain’s mechanisms for processing fast data streams from sensors, enabling complex turn-key sensor analytics functionalities, with 10,000x higher performance per watt than competing solutions. Innatera's technology serves as a critical enabler for next-generation use cases in the IoT, wearable, embedded, and automotive domains. We’re looking for a Staff Digital Design Engineer to own the design of high-complexity digital IPs and take an active technical leadership role in the delivery of our next-generation neuromorphic SoCs. You’ll be instrumental in front-end digital design, spanning architecture definition, RTL implementation, verification, documentation, and collaboration with backend and applications teams. You’ll work across the full lifecycle — from drafting high-level requirements to supporting tapeout, while mentoring others and shaping our internal design methods. WE WILL TRUST YOU WITH: * Architect, design, and implement digital IP blocks and subsystems for our neuromorphic SoCs; * Translate high-level product and algorithmic requirements into RTL-level specifications and microarchitectures; * Own all front-end design activities including RTL coding (SystemVerilog/Verilog), simulation, synthesis, STA, and design documentation; * Collaborate with the verification team to review test plans and co-develop functional testbenches; * Draft timing constraints and interface closely with backend engineers during physical design and gate-level simulation; * Integrate third-party IP and contribute to SoC-level architecture and bring-up; * Apply low-power design techniques and optimize for PPA; * Work with cross-functional teams including algorithm, platform/firmware, applications, and analog design; * Mentor more junior engineers, contribute to code reviews, and elevate overall team's expertise. YOUR EXPERIENCE INCLUDES: * 7+ years of hands-on experience in ASIC digital design, with a focus on complex IP blocks and SoC-level integration; * Strong RTL design and debugging skills in SystemVerilog/Verilog; * Deep understanding of SoC architecture, memory-mapped bus interfaces, and IP integration flows; * Experience with Cadence tools and EDA flows; * Proven ability to define PPA goals, perform synthesis and static timing analysis; * Familiarity with DFT, gate-level simulations, and low-power design methodologies; * Comfortable with drafting specifications, design documents, and reviewing hardware/software integration requirements; * Have exposure to functional verification and writing or reviewing testbenches. Nice to have: * Familiarity with communication protocols (SPI, I2C, AMBA, OBI), DFT, and backend hand-off WHAT YOU NEED TO SUCCEED: * Excellent problem-solving and debugging skills; * Strong documentation habits and ability to formalize design specifications; * A collaborative, proactive mindset and willingness to work across disciplines; * Experience mentoring or coaching engineers is a plus; * Excellent communication and collaboration abilities, particularly in cross-functional team environments. WE OFFER YOU: * A dynamic working environment around a fearless engineering culture * Ambitious teams with the freedom to innovate * A Flexible working environment (work from home policy, flexible working hours, advantageous holidays scheme ..) * An inclusive company culture which embraces communication, diversity and support around holistic and personal development Whether you’re passionate about microarchitecture, excited by verification or physical design, driven by supporting operations, building strong teams, or mastering the details of accounting, we’d love to hear from you! If you're ready to shape the future of technology with us, click Apply and share your story. Innatera is proud to be an equal opportunity employer. We welcome applicants of all backgrounds and experiences and are committed to building a diverse, inclusive, and respectful workplace. All qualified applicants will receive consideration for employment without regard to race, ethnicity, religion, gender, gender identity or expression, sexual orientation, disability, age, or other protected characteristics. If you require accommodations during the recruitment process, please let us know – we’re happy to support you.