Role Overview You will design high-speed silicon photonic integrated circuits operating at the limits of bandwidth and integration, and take them from concept → tapeout → silicon validation. This role is suitable for strong PhD graduates through early-career engineers (~0–5 years experience) who want to work on real, production-bound systems, not just simulations. Roles & Responsibilities * Design and optimize silicon photonic devices and circuits, including: * High-speed modulators (MZI, ring, advanced structures) * Photodetectors and receiver building blocks * Passive components (couplers, filters, routing) * Perform multi-domain simulations (EM, circuit, thermal) to meet targets in: * Bandwidth (200G/lane+) * Insertion loss, extinction ratio, efficiency * Implement PIC layouts (GDS) using foundry PDKs and support tapeouts * Co-design with electronics and packaging teams for CPO/NPO systems: * RF effects, parasitics, signal integrity, and thermal constraints * Support silicon bring-up and characterization: * Correlate measurement vs simulation * Drive design iterations and improvements * Contribute to design libraries, modeling, and methodology development Requirements * Education * PhD in Electrical Engineering, Physics, or related field (silicon photonics or closely related area) * Experience * 0–5 years of relevant experience (including fresh PhD graduates) * Technical Skills * Experience in design and simulation of silicon photonic devices or PICs * Strong understanding of guided-wave optics and device physics * Familiarity with tools such as Lumerical, COMSOL, or equivalent * Implementation Skills * Exposure to PIC layout and tapeout flows (PDK, DRC/LVS) * System Awareness * Basic understanding of optical communication systems and/or RF effects Nice to Have * Experience with high-speed devices (>100 GHz bandwidth or equivalent) * Exposure to CPO/NPO or optical transceiver architectures * Familiarity with SiPh + III-V integration * Experience with inverse design / adjoint methods (e.g., Meep) Why Join Us * Work on real products at 200G/lane+, not just research prototypes * Direct impact on AI infrastructure and hyperscale systems * Fast iteration cycles from design → silicon → system * High ownership early in your career * Comprehensive benefits package including health insurance * Collaborative environment with world-class engineering and R&D teams